The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
3D ICs based on Through-Silicon-Vias (TSVs) enable the stacking of logic and memory dies to manufacture chips with higher performance, lower power, and smaller form factor. To improve the yield of the memory dies in 3D ICs, this paper proposes aBuilt-In Self-Repair (BISR) architecture which allows the sharing of spares between different layers of dies. The corresponding pre-bond (before the memory...
The three-dimensional (3D) random access memory (RAM) using through-silicon via (TSV) has been considered as a promising approach to overcome the memory wall. However, cost and yield are two key issues for volume production of 3D RAMs, and yield enhancement increasingly requires test techniques. In this paper, we first introduce issues and existing techniques for the testing and yield enhancement...
2.5D Stacked ICs (2.5D-SICs) consist of multiple active dies (or 3D towers of active dies), which are placed side-by-side on top of and interconnected through a passive silicon interposer base which contains Through-Silicon Vias (TSVs). A previously presented post-bond test and Design-for-Test(DfT) strategy for such 2.5D-SICs implements a serial Test Access Mechanism (TAM) for interposer and micro-bump...
Through-Silicon Vias (TSVs) enable high-density, low-latency, and low-power interconnects for system chips that consist of multiple dies. In “2.5D” Stacked ICs (2.5D-SICs), multiple dies without TSVs are stacked side-by-side on top of a passive silicon interposer base containing TSVs. In true 3D-SICs, multiple dies containing TSVs themselves are vertically stacked; one or multiple of such stacks are...
Three-dimensional (3D) integration using through silicon via (TSV) has been widely acknowledged as one future integrated-circuit (IC) technology. A 3D IC including multiple dies connected with TSVs offers many benefits over current 2D ICs. However, the testing of 3D ICs is much more difficult than that of 2D ICs. In this paper, we propose a cost-effective built-in self-test circuit (BIST) to test...
In this paper, we propose a method that can characterize the propagation delays across the Through Silicon Vias (TSVs) in a 3D IC. We adopt the concept of the oscillation test, in which two TSVs are connected with some peripheral circuit to form an oscillation ring. Upon this foundation, we propose a technique called sensitivity analysis to further derive the propagation delay of each individual TSV...
The three-dimensional (3D) integration technology using through silicon via (TSV) provides many benefits over the 2D integration technology. Although many different manufacturing technologies for 3D integrated circuits (ICs) have been presented, some challenges should be overcome before the volume production of 3D ICs. One of the challenges is the testing of 3D ICs. This paper proposes test integration...
This paper is based on 3DS MAX software to make a simple architectural model, and combines with MaxScript language to implement two parallax graphics and animation roaming of a fixed path. Then this paper imports the architectural model into OGRE, uses the OGRE rendering out two parallax graphics, and achieves a free roaming. Finally, it uses simple tools to verify the generated disparity maps do...
In the past few years, we have witnessed the energy crisis and the financial tsunami that played an unwanted duo, changing the world in many aspects that affect most of us. Like many others, the semiconductor industry is trying to recover from the depression triggered by the duo. While companies are working hard in getting out of the slump, many research organizations are rethinking how their R&D...
A method extended from a constrained Delaunay algorithm, which generates the multi-tissue tetrahedral meshes for segmented medical images, is proposed in this paper. With an external boundary surface and internal sampling points, the anatomical objects are tetrahedralized homogenously. A new tissue-labeling scheme is utilized to assign the distinct tissue types of the additional inserted points and...
A three-dimensional (3D) CMOS imager constructed by stacking a pixel array of backside illuminated sensors, an analog-to-digital converter (ADC) array, and an image signal processor (ISP) array using micro-bumps (ubumps) and through-silicon vias (TSVs) is promising for high throughput applications. However, due to the direct mapping from pixels to ISPs, the overall yield relies heavily on the correctness...
Three-dimensional (3D) integration using through silicon via (TSV) is an emerging technology for integrated circuit designs. 3D integration technology provides numerous opportunities to designers looking for more cost-effective system chip solutions. In addition to stacking homogeneous memory dies, 3D integration technology supports heterogeneous integration of memories, logic, sensors, etc. It eases...
As we adopt more advanced process technologies, the volume production of memory devices, such as DRAM and Flash, becomes more difficult. It seems inevitable that during the ramp-up period, the initial manufacturing yield will be lower, and it takes more time and effort to improve the yield to a reasonable level. Although redundancy can be used to improve the yield eventually, the reserved spares may...
In this paper, a Web browser based garment and mannequin 3D display system for online cloth virtual fitting room is described. The system architecture and related techniques such as geometry description, data structure, real-time drawing, organization of scene and graphic primitives, communication with ActiveX control and JavaScript are discussed. The prototype system shows good display effect and...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.