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Significant advances in the field of configurable computing have enabled parallel processing within a single Field-Programmable Gate Array (FPGA) chip. This paper presents the implementation of a flexible and programmable Single Instruction Multiple Data (SIMD) processing system on FPGA that can be adapted to the application. Its implementation is based on an IP (Intellectual Property) assembling...
Network on chip (NOC) has emerged as a promising alternative to ensure communication for Multiprocessor systems on chip (MPSoC). This paper proposes a hybrid verification approach of Delta multistage interconnection networks for MPSoC. At the generic level, we propose a formal specification of the network in the ACL2 theorem proving environment. We will ensure the soundness of our verification approach...
The system-level modeling and simulation framework Sesame/Artemis aims to efficiently explore the design space of heterogeneous embedded multimedia architectures. The Sesame environment provides several methods and tools to quickly and separately build the application process network model, the target architecture model, and the mapping model of the application onto the architecture. In addition,...
This paper presents an idea of automatic generation of SoC architecture from a functional specification. Starting from an application task graph, C code will be generated automatically. Then the user can add the specific code of each task. Compilation rules are used in order to have a correct task graph and c code. Finally, an automatic generation of hardware and software SoC architecture will be...
In Multi-Processor System-on-Chip (MPSoC) architectures equipped with shared-memory, caches have significant impact on performance and energy consumption. Indeed, if the executed application depicts a high degree of reference locality, caches may reduce the amount of shared-memory accesses and data transfers on the interconnection network. Hence, execution time and energy consumption can be greatly...
Single instruction multiple data processors are increasingly used in embedded systems for multimedia applications because of their area and energy-efficiency. Neighboring communications between the processing elements are a key issue in SIMD processors. They are present in most data parallel applications. However, the lack of flexibility in major parallel architectures is its main shortcoming. In...
Multiprocessor system on chip is a concept that aims to integrate multiple hardware and software in a chip. multistage interconnection network is considered as a promising solution for applications which use parallel architectures integrating a large number of processors and memories. in this paper, we present a model of multistage interconnection network and a design of prototyping on FPGA. This...
The embedded systems are more and more complex. They must answer to contradictory constraints. Indeed, these systems integrate new functionalities that require high performance architectures. At the same time, these systems must be flexible and adaptive since they work in a fluctuating environment and have a quite unpredictable workload. In order to answer to all these constraints, we propose a new...
The H.264/AVC (Advanced Video Codec) new video coding standard provides higher coding efficiency relative to former standards at the expense of higher computational requirements. Given the potential applications of this technology, we are developing an application environment able to decode an MPEG2 stream, convert it into an H.264 stream, and stream it over a network. This paper focuses on the H...
Future embedded systems will integrate hundreds of processors. Current design space exploration methods cannot cope with such a complexity. It is mandatory to extend these methods in order to meet future design constraints. We believe one solution is to add a new design exploration step above current methods. This extension corresponds to an abstraction rising to provide designer with a restricted...
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