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There is growing evidence that current architectures do not well handle cache-unfriendly applications such as sparse math operations, data analytics, and graph algorithms. This is due, in part, to the irregular memory access patterns demonstrated by these applications, and in how remote memory accesses are handled. This paper introduces a new, highly-scalable PGAS memory-centric system architecture...
A teaching apprentice program was implemented for senior-level engineering graduate students at the University of Notre Dame during the spring of 2009. The goal of the program was to offer a mentored teaching experience to graduate students that would soon be taking on roles as faculty members at institutions across the country. Responsibilities included: (1) teaching two sections of the first-year...
A trend of growing significance in the arena of advanced microprocessor chip design is the inclusion of multiple processor cores onto the same die with significant parts of the memory hierarchy. This is done to reduce both non-recurring design costs and power dissipation, and to get more computational capability and utilization out of the silicon. A side-effect, however, is the opportunity to leverage...
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