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In advanced nano-scale fabrication technology, maintaining both manufacturing yield and chip reliability is a challenging issue. Recent manycore processors provide inherent core redundancy and the redundancies can be exploited to resolve the yield and reliability problems. In this paper, we develop asymptotic analysis and simulation models to better understand performance and yield joint-characteristics...
Despite the rapid growth of green vehicle markets in recent years, its components including control units are still very expensive compared to those on the gasoline/diesel powered vehicle. In order to reduce costs and save more space on the vehicle, integration technology is required to develop. This paper proposes the development progress and optimization of integrated Power Control Unit of Hybrid/Electric...
This paper presents a flaw in the permission scheme of Android. The Android framework enforces a permission-based security policy where an application can access the other parts of the system only when the application is explicitly permitted. The security of the framework depends to a large extent on the owner of a device since the authorization decisions are mainly made by the user. As a result,...
Balsa developed by Advanced Processor Technology (APT) Group of Manchester University presents robust design environment that supports both a framework for synthesizing asynchronous hardware systems and the language for describing such systems. In this paper, a design of microprocessor, MSP430, in balsa language and the functional verification of the controller is presented. Back-end retargeting is...
The performance of arithmetic adders varies widely in their power consumption, delay, and area requirements. To acquire more fine-grained tradeoffs in the power-delay tradeoff curve of a binary adder, the heterogeneous adder architecture is adopted. In heterogeneous adder architecture, a binary adder is decomposed into sub-adder blocks with different carry propagation schemes and precisions. Thus...
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