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We describe a custom multiple-module multiplexer integrated circuit (MMMIC) that enables the combination of discrete Electron multiplying charge coupled devices (EMCCD) based imaging modules to improve medical imaging systems. It is highly desirable to have flexible imaging systems that provide high spatial resolution over a specific region of interest (ROI) and a field of view (FOV) large enough...
Starting at the 65-nm node, stress engineering to improve the performance of transistors has been a major industry focus. An intrinsic stress source-shallow trench isolation (STI)-has not been fully utilized up to now for circuit performance improvement. In this paper, we present a new methodology that combines detailed placement and active-layer fill insertion to exploit STI stress for performance...
This paper reports the design and fabrication of a membrane-supported spurline band-stop filter. The filter was fabricated using silicon bulk micromachining technique and a CMOS compatible metal/dielectric deposition RF sputtering technique. A closed-form expression of an equivalent value of dielectric constant is also derived and introduced to account for a multi-layer dielectric stack formed as...
In this paper, we report the design and fabrication of high performance Ka-band inset- fed micromachined patch antenna using post- CMOS compatible process technology. The main emphasis of this paper is to demonstrate use of RF sputtering as potential metal-dielectric films deposition-process for rapid prototyping of many antenna structures in the absence of access to a well- established MEMS foundry...
Shallow trench isolation (STI) is the mainstream CMOS isolation technology. It uses chemical mechanical polishing (CMP) to remove excess of deposited oxide and attain a planar surface for successive process steps. Despite advances in STI CMP technology, pattern dependencies cause large post-CMP topography variation that can result in functional and parametric yield loss. Fill insertion is used to...
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