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Visual cryptography is a secret sharing scheme which uses images distributed as shares such that, when the shares are superimposed, a hidden secret image is revealed. In extended visual cryptography, the share images are constructed to contain meaningful cover images, thereby providing opportunities for integrating visual cryptography and biometric security techniques. In this paper, we propose a...
In this paper, we investigate the energy cost of the FPGA implementation of two cryptographic algorithms targeted to wireless sensor networks (WSNs). Recent trends have seen the emergence of WSNs using sensor nodes based on reconfigurable hardware, such as a field-programmable gate arrays (FPGAs), thereby providing flexible functionality with higher performance than classical microcontroller based...
In recent years, the hardware implementation of stream ciphers has attracted the interest of many designers, mainly due to their low implementation area on a chip. However, to date, in comparison with block ciphers, side channel attacks have not been extensively analyzed for their applicability to stream cipher hardware implementations. However it has been shown that simple power analysis (SPA) attacks...
Pipelined S-boxes are usually used in high speed hardware implementations of the Advanced Encryption Standard (AES), and not typically found in compact implementations because of the extra complexity added by the pipeline registers. In this paper, the area and speed performance of applying a pipelined S-box to compact AES hardware implementations is examined. A new compact AES encryption hardware...
In this paper, we focus on secure communication in wireless sensor networks (WSNs). Specifically, we investigate different factors which affect the energy cost of link layer cryptographic security schemes, such as the payload size, the source of the initialization vector, and the channel quality. We propose an approach to evaluate the performance of cryptographic communication schemes by developing...
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