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In this work, the influence of the Ge amount at source on transistor efficiency and intrinsic voltage gain of vertical gate all around TFET is experimentally evaluated, comparing three different source compositions. The reference transistor has a source of 100% of Si, and the studied devices have 27% and 100% of Ge at the source. The increase of the Ge amount at source enhances the tunneling current,...
This work presents an experimental analysis of the transconductance in vertical Ge source gate-all-around Tunnel-FETs for temperatures ranging from 100K to 400K. It was observed that the gm hump is related to the different conduction mechanisms which can be explained by the different temperature impact for each mechanism. This effect was also studied using numerical simulations.
In this work a comparison of the analog performance between vertical silicon Nanowires Tunnel Field Effect Transistors (NW-TFETs) and nanowires MOSFETs (NW-MOSFETs) is performed mainly focusing on the basic analog characteristics at room and high temperatures for the first time. The opposite transconductance trend as a function of temperature and the much lower (better) output conductance obtained...
This work studies the low frequency noise (LFN) behaviour of vertical nanowire Tunnel-FETs (NW-TFETs) with Si or Ge sources, where the latter devices have different HfO2 thicknesses (2nm and 3nm) in the gate stack. The presence of Ge in the source yields an increase in the current noise power spectral density (Sid) at low frequency, while Sid is reduced for the thinner HfO2, due to the reduction of...
In this work, the impact of the diameter on vertical nanowire Tunnel FETs analog parameters is evaluated experimentally and by numerical simulation, comparing two different source compositions, one with Si and another with Si73Ge27. The SiGe source device presents a higher tunneling current when compared with the Si source device, resulting in an increase of both transconductance (gm) and output conductance...
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