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An R2R DAC using three digital input levels rather than two is proposed as well as a modified two-level structure that emulates the three-level DAC??s benefits. This three-level structure provides power reductions of 79% and linearity improvements due to matching of a factor of 2 over the two-level case. Ideal implementation is also described in terms of the logic needed to code the DAC and the requirements...
A modified merged capacitor switching (MCS) scheme is proposed for the successive approximation register (SAR) analogue-to-digital converter (ADC). The conventional MCS technique previously applied to a pipelined ADC improves signal processing speed and, with use in the SAR ADC, this scheme achieves lowest switching energy among existing switching schemes. The MCS scheme achieves 93.4% less switching...
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