The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
As integrated circuit process technology is changing into the ultra deep submicron era, the complex interconnection topology and metal resistance shielding effects problem is very serious, resulting in very stiff interconnection structure. As inaccurate delay on stiff interconnect sinks creates a situation where decisions on when to evaluate by statistical static time analysis (SSTA) are not cluster...
Integrated circuit process technology is entering the ultra deep submicron era. At this level, interconnect structure becomes very stiff and the metal resistance shielding effects problem is more serious. Although several delay metrics have been proposed, they are inefficient and difficult to implement. Hence, we propose a new delay and slew metric for interconnect based on Beta distribution and which...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.