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A Complementary Buried Channel MOS(CBCMOS) integrated circuit has been fabricated on a SOI(Silicon On Insulator) substrate prepared by SDB(Silicon wafer Direct Bonding) technology. CBCMOS is a ``fully depteted buried channel'' MOSFET which is different from conventional ``surface buried channel'' MOS device in which a pn junction exists at channel surface, Moreover, pn junction is totally eliminated...
This paper presents a high performance Complementary Buried Channel FET device isolated by high quality silicon dioxide layer using Silicon wafer Direct Bonding technology (SDB/CBCFET). The structure and operational principle of this device is discussed. The properties of an improved SDB process is investigated. By means of 2D numerical simulation, effects of interface charge density of bonding interface...
A new high voltage (H. V) npn bipolar transistor for H. V BiCMOS IC's has been developed which is fully compatible with conventional low valtage n-well CMOS process. The npn transistor employs n-well of low valtage (L.V) CMOS as the collector drift region and it acts as the self-isolation region as well. The narrow self-aligned base is a result of double diffusion. The device has shown a high performene,...
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