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A new VLSI implementation for a finite field multiplier using reordered normal basis is presented. The hardware architecture uses domino logic building blocks as well as True Single Phase Clock (TSPC) flip-flops to achieve exceptional performance. The multiplier has been realized in a 0.18 μm CMOS process and can perform multiplication correctly up to a clock rate of 1.789 GHz, requiring 62048 μm2...
A high-speed VLSI implementation of a 233-bit serial-in parallel-out finite field multiplier is presented. The proposed design performs multiplication using a reordered normal basis; a permutation of a type II optimal normal basis. The multiplier was realised in a 0.18-??m CMOS technology using multiples of a domino logic block. The multiplier was simulated, and functioned correctly up to a clock...
A new VLSI implementation for a 197-bit finite field multiplier using redundant representation is presented. The proposed design uses a simple module designed in domino logic as the main building block for the multiplier. We have used .18 mum CMOS technology from TSMC for our design. The final multiplier design was successfully simulated at a clock rate of 1.82 GHz. The proposed multiplier is at least...
The sigmoid and hyperbolic tangent functions are usually used as the activation functions in Artificial Neural Networks (ANNs). The exponential nature of these functions make them difficult for hardware implementation. Hence, several different methods for approximating them in hardware are proposed. In this work, we present a MATLAB toolbox called the ldquoSigTan HDL Coderrdquo, that generates synthesizable...
Efficient implementation of the activation function is important in the hardware design of artificial neural networks. Sigmoid, and hyperbolic tangent sigmoid functions are the most widely used activation functions for this purpose. In this paper, we present a simple and efficient architecture for digital hardware implementation of the hyperbolic tangent sigmoid function. The proposed method employs...
The hyperbolic tangent function is commonly used as the activation function in artificial neural networks. In this work two different hardware implementations for the hyperbolic tangent function are proposed. Both methods are based on the approximation of the function rather than calculating it, since it has exponential nature. The first method uses a lookup table to approximate the function, while...
A Range Addressable Look Up Table (RALUT) is a non-linear memory storage element that has been shown to significantly reduce hardware requirements for matching data in particular applications. However, its ability to perform parallel pattern matching on large words can be applied in many areas. Most of the RALUT circuits presented in literature thus far are built with logic gates and tri-state buffers...
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