The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
Due to the rapid decrease of technology feature size speed related faults, such as Address Decoder Delay Faults (ADDFs), are becoming very important. In addition, increased leakage currents demand for improved tests for Bit Line Imbalance Faults (BLIFs)(caused by memory cell pass transistor leakage). This paper contributes to new and improved algorithms for detecting these faults. First it provides...
Almost all manufacturing memory test programs use the time-efficient Scan test to screen the defective chips in an early stage. Usually, Scan is used to screen out the easy-to-detect hard faults like stuck-at-faults. In this paper we will show how Scan can be modified to increase the fault coverage and detect unique faults. It will be shown that many additional faults are detectable using Scan if...
This paper presents an analysis, at the electrical level, of address decoder faults caused by resistive opens within (a) dynamic address decoders and (b) static address decoders, which have special circuits that deactivate them at fixed moment. Efficient algorithms are proposed to cover the targeted faults. DFT circuit, to facilitate the BIST implementation of the proposed tests, is also provided...
The continued increase of the integration density of systems on chip (SoCs) and the number of embedded memory blocks in them, together with the continued technology scaling, increases their sensitivity to a variety of potential manufacturing (new) defects. Standard march tests are usually used to achieve a good fault/defect coverage. This paper presents an experiment in diagnosing defects in the circuitry...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.