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The implementation of a complete low-power microphone uplink system is presented. The system comprises a low-dropout regulator (LDO), an input operational transconductance amplifier (OTA), and a 3rd order continuous-time sigma-delta (SigmaDelta) modulator. The LDO provides biasing to the microphone and OTA input. The OTA presents high input impedance to the microphone and act as a pre-amplifier. The...
A quad-band GSM/GPRS/EDGE receiver front-end including I and Q ADCs designed in 90nm digital CMOS technology is presented. The low band receiver designed for GSM850/GSM900 achieves 33dB gain, 1.9dB noise figure, 7.5dB of noise figure under blocking condition and -20dBm of in-band IIP3 with a power of 68mW, while the high band DCS/PCS receiver achieves 32dB gain, 2.2dB noise figure, 9.3dB of noise...
The implementation of a 3/sup rd/-order 50MS/s CT /spl Delta//spl Sigma/ modulator with 5 levels of quantization, for a CDMA2k receiver, is presented. Its 9nVrms//spl radic/Hz input referred noise produces 80dB of DR in a 600kHz BW for signals as low as 70mVrms. It draws 4mA from a single 1.5V supply, uses a 90nm CMOS process and occupies 0.25mm/sup 2/.
A low-voltage 4th order RF bandpass filter structure based on a two magnetically-coupled resonators prototype is presented. Each resonator is built using on-chip spiral inductors and accumulation-mode PMOS capacitors to provide center frequency tuning. The proposed architecture is using electric coupling to emulate the effect of the transformer thus providing bandwidth tuning with small passband ripple...
A low-power quadrature direct digital frequency synthesizer (DDFS) is presented. Piecewise linear approximation is used to avoid using ROM lookup table to store the sine values. ROM elimination has resulted in significant power and area savings. The proposed DDFS has been implemented using 0.5µm CMOS process and occupies 1.4mm2area. It achieves an extremely low power consumption of only 8mW at 100MHz...
A pseudo differential fully balanced CMOS OTA architecture with inherent common mode detection is proposed. Through judicious arrangement, the common-mode feedback circuit can be economically implemented. The OTA achieves a good CMRR and is suitable for low voltage operation. As an example of the applications of the proposed OTA, a 100MHz 4th order linear phase OTA-C filter is presented. The measured...
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