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A VLSI implementation of a multistage self-routing ATM switch fabric is presented. The size of the switch is 16/spl times/16 and can handle the OC-12 (622 Mbps) link rate. Based on a bit-slice architecture, the entire 16/spl times/16 switch is implemented using four identical chips. The switch hits multiple paths, created by a randomizer in front of the routing stages between each input-output pair...