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In this paper we present a new approach to the analysis of digital switching noise, by modeling it as a stochastic process. As well known, a pre-layout estimation of digital switching noise is a very difficult task. Therefore, mixed-signal IC design would benefit from a simple model that uses few parameters and allows to estimate digital switching noise with an acceptable level of approximation
This paper presents an approach for simulation of mixed-signal circuits, analyzing possible sources of disturbances in analog-digital integrated systems, such as current pulses drawn from voltage supplies. A closed-form expression of voltage and current in the pull-up and the pull-down of a CMOS logic gate can be derived. A computer program demonstrates the feasibility of the proposed approach. Simulation...
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