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A cascade non-decimation charge-domain filter (CNCDF) with noise-folding reduction for high attenuation and bandwidth was proposed. The CNCDF, based on non-decimation property, could suppress the noise-folding source from a down-sampling rate and duplicate-sampled signals upon a sensible input-clock rate (ICR). By using 600-MS/s ICR, the measurement showed 91-dB attenuation of the first folding signal,...
A quadrature charge-domain filter (QCDF) is proposed. This QCDF, based on the input phases, could provide a stop-band filtering and support an in-band filtering of noise. Through the use of FIR coefficient, the alias-band rejection (ABR) and in-band suppression (IBS) could be well controlled. Measurement shows the 27.1dB ABR and 31.3dB IBS from out-of-phase signals and in-phase signals, respectively...
A discrete-time (DT) anti-alias filter (AAF) with clock-efficient charge-domain filter (CECDF) for high attenuation and bandwidth was developed. This AAF possesses 88.86-dB attenuation and 13-MHz bandwidth at a 600-MS/s input-clock rate (ICR) and a 100-MS/s output-sample rate. The measured gain and IIP3 are 12.2-dB and 0-dBm, respectively, consuming only 5.56-mA from a 1.36-V power supply. The chip...
A quadrature charge-domain filter (QCDF) for frequency down-conversion and filtering is proposed. After measurement of QCDF by a 1072-MS/s sampling rate, a stop-band attenuation and bandwidth were 53-dB and 44-MHz, respectively. For quadrature performance after down-conversion, this QCDF provided -27.67-dB EVM upon a 64-QAM signal with 54-Mb/s. This chip consumed 7.7-mA power current upon a 1.2-V...
Integration of a programmable-bandwidth front-end (PBFE) based on clock-interleaving down-conversion filter (CIDCF) is presented. After demonstration, PBFE has a programmable bandwidth from 1-MHz to 110-MHz. Under 6.14-mA power current (excluding output buffer) and 1.2-V power supply, PBFE gets +8.2-dBm IIP3, +45-dBm IIP2, and 2.6-dB gain. Moreover, a better than 26.79-dB alias-band rejection and...
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