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Scratch-Pad Memories (SPMs) have been increasingly used in embedded systems due to their time predictability and better energy efficiency as compared to caches. However, the SPM is typically controlled by software, which is less adaptive to runtime instruction/data access patterns that are dependent on the input data and hence may lead to performance degradation. In this paper, we study the energy...
Scratch-Pad Memories (SPMs) have been increasingly used in embedded systems, for which it is important to reduce the leakage energy consumption. While there are several techniques to reduce the leakage energy for cache memories, those techniques may result in significant performance overheads for instruction SPMs. In this paper, we study a compiler-based approach to reducing the instruction SPM leakage...
In this paper, we study how to reduce the cache leakage energy efficiently in a hybrid SPM (Scratch-Pad Memory) and cache architecture. Since SPM can reduce the access frequency to the cache, we find it is possible to place the cache lines of the hybrid SPM-cache into the low power mode more aggressively than traditional leakage management for regular caches, which can reduce more leakage energy without...
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