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This work presents the circuit level design of a non-volatile D-latch (NVDL) using memristor that retains the stored data in the event of power interruption. The programming complexity of proposed NVDL, unlike previous NV latches, is simplified. The proposed NVDL is designed using 32nm node and results are compared with the volatile CMOS based D-latch. Simulation results show that the proposed NVDL...
In recent researches, much emphasis has been placed in developing non-volatile memories as candidates for replacement of volatile memories. Apart from non-volatility, memristive devices also have high switching speed, low energy consumption, and small device size. In this article, a novel one-bit memory cell using two transmission gates and one memristor (2TG1M) is proposed. SPICE simulations were...
Nonvolatile memories have emerged in recent years and have become a leading candidate towards replacing dynamic and static random-access memory devices. In this article, the performance of physical TiO2 and TaO2 nonvolatile memristive devices were compared in terms of switching speed, retention and endurance. TaO2 memristive devices have shown better endurance (108 times more switching cycles) and...
This paper presents a novel LTSPICE based Phase Change Memory (PCM) cell emulator model, using only off the shelf discrete electronic components. The electrical based model simulates not only the continuous resistance change (as corresponding to amorphous and crystalline phases), but also the temperature profile across the cell during programming, while assessing the impact of the programming time...
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