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User customizable logic paper (UCLP) with a sea-of-transmission-gates (SOTG) of organic CMOS transistors is developed to enable users to fabricate custom integrated circuits by printing 200 ??m width interconnects with at-home ink-jet printers for educational purposes. Compared with the conventional gate array, the SOTG reduces the area of the circuits by 11 to 85%.
A hybrid optoelectronic router which optimally utilizes both optical and electrical technologies is promising for reducing power, size, and latency, with the ability to process arbitrary-length ultrafast asynchronous optical packets and support flexible, IP-related services (QoS, TTL, multicast routing, etc.).
A hybrid optoelectronic packet switched router which optimally combines the intelligence of electronics with the high capacity and speed of optics is promising for reducing power, size and latency, while maintaining the ability to process arbitrary-length high-speed asynchronous optical packets and support flexible network services.
We describe the development of an optically clocked transistor array (OCTA) interface device for label swapping high-speed asynchronous burst optical packets. The OCTA integrates the three critical functions of serial-to-parallel (SP) conversion, parallel-to-serial (PS) conversion, and clock-pulse generation into a simple optoelectronic integrated circuit (OEIC) to create a single-chip interface between...
A novel photonic packet router for 40-Gbit/s 16-bit burst optical packets has been developed using serial-to-parallel and parallel-to-serial converters, optical clock-pulse generators, and a 4/spl times/4 CMOS-based processor with label swapping, switching, and buffering functions.
Bit-by-bit label-recognition for 40-Gbit/s 16-bit burst-mode optical packets is achieved by means of a self-serial-to-parallel conversion system and a CMOS circuit. 1times4 self-routing controlled by 2-ch signals from the label-recognition system is demonstrated
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