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For the node chips of wireless sensor networks (WSN), low power and fast settling are the two most important factors. In this paper, a low-power fast-settling phase-locked loop (PLL) frequency synthesizer working at 1.72 GHz∼1.74 GHz is designed for a 100 kb/s gauss frequency shift keying (GFSK) WSN transceiver. Low power consumption is realized by a bond-wire voltage-controlled oscillator (VCO) and...
This paper presents the design of 0.1-3.6GHz quad phase-locked loop (PLL) for multiple SerDes standards. The PLL has an adaptive bandwidth for different applications. But the bandwidth doesn't vary with processes and temperatures in every application condition for the process-dependent charge pump current and high precision bandap reference circuit. The core power of the PLL is 6.9mA at 3.125GHz without...
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