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A 35-ns-access-time 256 K (32*8) EEPROM using a double-poly/double-metal n-well 1.0- mu m CMOS process, a standard two-transistor EEPROM cell, pseudodifferential sensing, and address transition detection (ATD) is described. Pseudodifferential sensing using a reference cell is used rather than the more area-intensive fully differential cell approach. In order to achieve endurance and data retention...
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