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This paper proposes the high-performance architecture of unified inverse transform circuit for H.264/AVC high profile decoder. Four processing elements operate in parallel to achieve the high performance. Two-stage pipeline technique is applied in each processing element. All inverse transforms required in H.264/AVC high profile decoding are covered by the proposed circuit. Our circuit consists of...
We describe a design method to unify the IDCT and IQ operations for three popular video compression standards such as H.264 (up to high profile), MPEG-4 and VC-1. We use the concept of delta coefficient matrix to implement the unified IDCT circuit. Our circuit supports 4-point and 8-point IDCT's for H.264, MPEG-4 and VC-1. The unified IQ circuit uses a shared multiplier. The entire circuit was verified...
Current trend of digital convergence leads to the need of the video decoder that can support the multiple standards such as H.264, MPEG-4 and VC-1. We implemented a circuit to perform the transform and quantization operations for the three video compression standards. Instead of designing the circuit for each standard separately, we analyzed the transform and quantization operations in detail to find...
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