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With the rising popularity of mobile devices, recent years have witnessed a growing interest in document image retrieval (DIR). In conventional Bag-of-Visual-Words (BoVW) based document image retrieval method, only SIFT or SURF feature is used to locate feature points and produce a codebook, which has a low discriminative power. Though several multiple feature based BoVW methods are proposed, these...
A novel silicon PIN diode with guard ring structure on top of the device for fast neutron dose measurement is presented. The device is designed to include p+ and n+ square contacts on each side of the high resistivity silicon, and a p+ ring surrounding the square p+ region on front side of the device. The sensitivity of the PIN diodes to Am-Be isotropic fast neutron radiation source, whose energy...
TSV (Through silicon via) is the new generation of packaging technology in integrated circuits industry. DRIE (deep reactive ion etching) process is the critical technology for TSV manufacturing. The simulation on DRIE has been researched a lot for process development. However it is still difficult to involve the equipment parameters directly in the simulation which is an obstacle to the application...
This paper carried out extensive research about temporary bonding/debonding schemes based on propylene carbonate (PPC). The temporary bonding was investigated at different bonding temperatures and bonding time. The bonding pressure is 0.2 MPa. The highest shear strength of 4.1 MPa is achieved at bonding temperature of 150°C and bonding time of 20 min. The bonded wafers were debonded using thermal...
As the requirement of portable and smart devices rapidly increasing, applications of high performance 3D integration and M/NEMS packaging have enormous market potential. High speed in-line testing is a critical bottleneck for 3D SiP and TSV processes. In this paper, we promote a method of in-line testing for interconnection performance of TSV structures, and a novel 3D CPW model for performance testing...
Metallic wafer bonding has emerged as a key technology for microelectronics and MEMS. The Si wafers with Al metallization film on surface are bonded by applying Sn film as intermediate layer, aiming at the application of heterogeneous integration. Averaged shear strength of 9.9 MPa is realized at bonding temperature as low as 280°C with bonding time as short as 3 minutes under the bonding pressure...
In this paper, a through-stack-via integration process for SRAM module was developed using wafer level pre-patterned BCB bonding. A SRAM module with a built-in decoder has been designed according to this integration process. TSVs passed through all stacked SRAM chips and common signals, including address bus, data bus, power, write and read control, were connected to the same TSV using RDL. The chip...
Metallic wafer bonding is today becoming a key enable technology in MEMS packaging and heterogeneous integration. The Si/Al/Sn-Sn/Al/Si bonding structure with low temperature, low pressure and short bonding time is investigated in this paper. The bonded 4 inch Si wafers were diced into dies. Scanning electron microscopy (SEM) and energy dispersive X-ray spectroscopy (EDS) were applied for interface...
The piezoresistive pressure sensor has been used to measure the dynamic pressure as well as in high temperature environment. In this paper, a novel TSV 3D packaged pressure sensor is proposed for high temperature environment and dynamic measurement. The pressure sensors and the silicon carrier with TSV are flip chip bonded using Au/Sn eutectic for hermetic encapsulation. In order to reduce the stress...
3D System in Package with Through Silicon Via has been a promising solution to enhance the integrated density[1]. However, as more and more devices are integrated in one package, the reliability and performance is affected by the work environment, such as temperature variation, vibration, drop and so on. Many researches has been done on the drop analysis of solder ball on the PCB substrate, but few...
In this paper, a stacked SRAM chip module is presented and simulation results are demonstrated. A novel 3D integration process is presented and challenging issues are addressed. With this novel process, there's no need to do grinding/polishing of copper overburden after filling of TSV by copper electroplating. Copper microbumps will be formed directly on the active side in the filling of TSV by copper...
The radiofrequency identification (RFID) technology is used widely in variety of applications, in most applications standard radiofrequency and communication HW are used and only system SW should be matched to the particular requirements. But in the case of a very high speed of the tracked object, the Doppler frequency shift may lead to serious problems in communication between readers and tags. In...
Three-dimensional (3D) die stacking based on the Through Silicon Via (TSV) is a promising new packaging technology for its high performance, multi functionality, relatively smaller chip size and lower cost etc. However, the application of TSV in 3D SiP will introduce lots of new problems regarding the reliability, such as thermal stress, deformation, fatigue failure In this study, the thermal-mechanical...
In this paper, the potential application of combining cylindrical TSV and annular TSV into 3D integration was studied. First, the schematic fabrication process of cylindrical and annular TSV was proposed. Lumped equivalent circuit model of these different kinds of TSV structures from the physical configuration were studied and verified. Besides, 3D full wave electromagnetic (EM) simulations of cylindrical...
TSV interposer provides a cost efficient solution way for 3D IC integration. In this paper, a TSV interposer technology is proposed for SRAM stacking. A simple fabrication process is developed for cost-sensitive application. The mushroomlike Cu/Sn bumps by copper overburden can be directly connected with other substrate, which eliminates a CMP planarization to improve the yield and reduce fabrication...
As multiple layers of planar device are stacked to alleviate signal delay problem and reduce chip area, Through silicon via (TSV) is introduced to replace the large number of long interconnects needed in previous 2D structure. However, the thermal-mechanical reliability problems of TSVs, such as interfacial delamination, via cracking and so on, have become a serious reliability concern. In this paper,...
As the expanding of the production scale, the efficiency and the stability of the manufacturing line begin to dominate the key role in manufacturing industry accompany the material monitor. It is learned that effective and correct operation will save a lot of producing cost. Therefore, in this paper, a monitor and control system framework architecture based on Radio Frequency Identification (RFID)...
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