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A 2nd generation of Implant Free Quantum Well pFETs is presented in this work. SiGe25%-embedded Source/Drain was implemented, leading to an excellent short channel control and logic performance (1mA/um-ION@-1V). No narrow-width effect was found and a multi-VTH strategy is also offered. Performance of the strained-IFQW pFETs was finally demonstrated at lower VDD.
This work demonstrates the successful integration of 0.85nm-EOT Si0.45Ge0.55-pFETs using a gate first approach. An in-depth analysis, ranging from capacitor-level up to circuit-level is carried out, with systematic benchmarking to a conventional Si-channel reference. Outperforming the state-of-the-art Si0.55Ge0.45-pFETs, an ION of 630μA/μm at LG_POLY = 35nm with IOFF = 100nA/μm and VDD = -1V has been...
In this study, we report a direct comparison between two epitaxial silicon processes: 500degC using SiH4 and 350degC using Si3H8. Following four different metrics, we demonstrate that the reduction of silicon growth temperature results into the introduction of negatively charged defects possibly located at the Si/SiO2interface. However, the Epi Si growth at 350degC with Si3H8 remains beneficial compared...
The introduction of high mobility channel materials together with new device structures with improved subthreshold slope provides a pathway into continuing the performance scaling of CMOS technology beyond the classical Si roadmap. The combination of Ge pMOS devices with nMOS devices made on very high electron mobility III/V compounds such as InGaAs can be achieved by selective growth on a Si-wafer,...
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