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GaN-on-Si power devices are highly desirable for energy-efficient and compact power conversion systems. However, their performance and stability/reliability can be adversely affected by dynamic charging/discharging of interface and bulk traps. These issues need to be addressed by developing new processing technologies or structure designs, while appropriate characterization techniques are essential...
A normally-off gate-recessed double-channel MOS-HEMT (DC-MOS-HEMT) has been recently demonstrated with the advantages of (1) low on-resistance and (2) low sensitivity of threshold voltage on recess depth. A critical design parameter for achieving a low overall ON-resistance is identified to be the separation of the two heterojunction channels that determines the strength of electrical coupling between...
A temperature to digital converter (TDC) that does not require either a reference generator or an ADC and that exhibits low supply sensitivity, small die area, and low power consumption is introduced. A prototype circuit designed to support power management applications over the [60 °C, 90 °C] temperature range was implemented in an IBM 0.13μm CMOS process with a 1.2V power supply for use as either...
In this work, the performance of GaN-based MOS-Channel-HEMTs (MOSC-HEMTs) are shown to be greatly improved by a thin ALD-grown AlN interfacial layer inserted between the amorphous Al2O3 gate dielectric and GaN-channel. The single-crystalline AlN interfacial layer effectively blocks oxygen from the GaN surface and avoids the formation of detrimental Ga-O bonds. Frequency-dispersion in C-V characteristics...
A novel phase change memory (PCM) cell with Additional Top Electrode (ATE) is introduced to investigate the scaling behavior of the off-state with the dimension of amorphous state region. The electrical conduction in ultra-thin amorphous state layer is investigated. The trap spacing is one of the key parameters that govern the conduction mechanism and threshold voltage in the sub-threshold region...
The disordered bonds may generate a redistribution of trap states, resulting in unstable electrical characteristics such as threshold voltage, subthreshold swing, and mobility of carriers. The weak or broken bonds may contribute to the redistribution of trap states, and lead to unstable electrical characteristics of the a-Si:H TFTs on plastic substrates. We conclude that the DOS of an a-Si:H layer...
We have demonstrated a robust magnetic tunnel junction (MTJ) with a resistance-area product RA=8 Omega-mum2 that simultaneously satisfies the statistical requirements of high tunneling magnetoresistance TMR > 15sigma(Rp), write threshold spread sigma(Vw)/<Vw> <7.1%, breakdown-to-write voltage margin over 0.5 V, read-induced disturbance rate below 10-9, and sufficient write endurance, and...
A LDMOSEFT structure on SOI substrate is studied mainly in this paper. This device has good performance in terms of low leakage current, low parasitic capacitance, low conduction power consumption and high switch speed. In this research, current-voltage relationship derivation and electrical characteristics, such as threshold voltage, breakdown voltage, on-resistance, parasitic capacitances, switching...
ZnO nanowire films were grown on stainless-steel disc with a thin layer of Au as catalyst by thermal evaporation in a vacuum chamber. Morphology of the nanowires was investigated by scanning electron microscopy, while emission site distribution images were recorded by a CCD camera. The nanowires were then used as cathodes in a luminescent tube and its turn-on and threshold voltages and fields, and...
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