The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
A 2-tap pre-emphasis SST transmitter with skin effect loss equalisation is presented. The transmitter features the ability of compensating the low frequency loss caused by the channel skin effect. The transmitter equalisation coefficient setting and driver impedance adjustment are mutually decoupled. Fabricated in 65 nm CMOS technology, the transmitter can operate up to 20 Gbit/s while consuming 39...
This paper presents a high precision multi-bit audio ΔΣ modulator working under IV supply. We propose a kind of asynchronous 4-bit successive approximation quantizer without fast clock generation. Feed-forward topology with digital summing is adopted to relax the amplifier design requirement. Power efficient single stage OTA is adopted to drive the large sampling capacitor with...
A single-loop second-order 3 bits ΔΣ modulator in 180 nm standard CMOS is presented. The design is intended to achieve high linearity in low-voltage low-power environment. The modulator achieves 89-dB SNDR and 98-dB SFDR in 20Hz~16kHz signal bandwidth, while the power consumption is 210 μW under 1-V supply voltage.
A 15-bit 3rd order ΔΣ modulator is presented. The feed forward topology with 18-level quantizer is adopted. The signal swing of the 1st integrator is effectively suppressed. A current-mirror OTA with 42dB DC gain is used in the 1st integrator. Chop stabilization is employed to remove the flicker noise. The prototype is fabricated in 0.18μm CMOS. The active die area is 0.85×0.85mm2. The power consumption...
A 1V ultra-low power high precision voltage reference is designed and implemented with UMC mixed-signal 0.18-mum CMOS technology. A novel low-voltage high-precision current mirror is introduced in the voltage reference in order to reduce temperature coefficient and line regulation. Post simulation results show that the reference voltage and total power dissipation are 406.5 mV and 0.83 muW, respectively...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.