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3D Stacked Image sensor is the stacking of a Back-Side Illuminated (BSI) CMOS Image Sensor on a logic die. It enables compact size, higher performances and additional functionalities compared to standard BSI sensors. The highest footprint reduction is obtained with 3D hybrid bonding with metal interconnects between top and bottom tiers. Hybrid bonding process with oxide / copper direct bonding allows...
Sub 200 nm wafer-to-wafer (w2w) overlay accuracy on the entire 300 mm wafer was successfully demonstrated via wafer level Cu/SiO2 hybrid bonding. Cu bonding pads relevant for back-side illuminated (BSI) complementary metal oxide semiconductor (CMOS) image sensor (CIS) were used for the experiment. Further, a crucial component to improve the overlay accuracy, namely the overlay model which identifies...
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