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A new technique by charge injection is introduced to investigate the charging effect on weak oxide in the gate stack of high-k metal gate process. The oxide with extra oxygen vacancy is more vulnerable to process charging, as verified by the correlation of Vt vs. subthreshold swing degradation, SILC spectrum, and chemical bonding state analysis using X-ray photoelectron spectroscopy (XPS) and electron...
The gate-all-around (GAA) silicon nanowire transistor (SNWT) is considered as one of the best candidates for ultimately scaled CMOS devices. This paper discusses the process impact on nanowire LER/LWR, as well as the impact of 2D nanowire LER on performance variation and degradation. And it is found that SNWTs, which is immune to channel RDF(random dopant fluctuation), exhibit SDE-RDF which is enhanced...
In this paper, the effect of different preparation process on the secondary electron emission performance was investigated. The different doping methods and preparation techniques such as Solid-Solid doping(SS), Liquid-Solid (LS) doping, Liquid-Liquid (LL) doping, Spark Plasma Sintering (SPS), Air Plasma Spray (APS) method, were introduced into this kind of materials. The microstructure of samples...
The passivation potential of PECVD SiNx deposited on undiffused p-type Si surfaces is investigated. The influence of post-deposition annealing temperature and the film parameters (refractive index and thickness) on the implied Voc of textured, commercial grade, p-type CZ wafers was studied. Improvement in the implied Voc values of SiNx passivated CZ wafers was observed for two different SiNx films...
In this paper, the problem of high interface traps at the SiO2/SiC interface is introduced and their possible cause and physical nature are discussed. Different state-of-the-art approaches to chemically modify the interface for 'passivating' such electrically active traps is reviewed. In particular, the significant improvement of the interface by nitridation via nitric oxide post-oxidation annealing...
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