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We review compact modeling techniques that enable a surface-potential-based approach to modeling MOS transistors. These include symmetric linearization method, an analytical approximation of surface potential and surface potential-based extrinsic device model. General techniques are illustrated by application to the PSP model.
We report a bias-dependent, nonlinear body resistance model suitable for accurate characterization of PD/SOI technology. This model is implemented in the surface potential based SOI MOSFET compact model PSP-SOI and experimentally verified for 65 nm PD/SOI technology node.
This paper reports recent progress on partially depleted (PD) SOI modeling using a surface potential based approach. The new model, called PSP-SOI, is formulated within the framework of the latest industry standard bulk MOSFET model PSP. In addition to its physics-based formulation and scalability inherited from PSP, PSP-SOI captures SOI specific effects by including a floating body simulation capability,...
We report the first SOI MOSFET model that takes advantage of the recent progress in bulk MOSFET modeling. The surface-potential-based model is implemented without iterative loops, and includes physical modeling of the moderate inversion region and all small-geometry effects without relying on the traditional threshold-voltage-based formulation. The new model is verified for a 90 nm node process (40...
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