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Channel Hot Carrier (CHC) degradation on uniaxially strained pMOS and nMOS samples with different S/D materials has been analyzed. The results show that the CHC damage is larger in the strained samples in comparison with the unstrained devices, and increases with the temperature.
In this paper, we report the first demonstration of n-channel FinFETs with in-situ doped silicon-carbon (Si1-yCy or SiC:P) source and drain (S/D) stressors. New key features incorporated in this work for performance enhancement includes record-high substitutional carbon concentration Csub of 2.1%, high in-situ phosphorus doping concentration in S/D, extended Pi -shaped S/D stressors that wrap around...
We realized Impact Ionization Nanowire Multiple-gate Field- Effect Transistors (I-MuGFETs or I-FinFETs) having a multiple- gate/nanowire-channel architecture to exploit the superior gate-to- channel coupling for reduced breakdown voltage VBD and enhanced device performance. The first p-channel Impact Ionization MOS transistor (I-MOS) having in situ doped source was also demonstrated. An in situ phosphorus-doped...
This paper presents results on conventional, deep sub-micron short-channel Ge p-and nFET devices with a HiK/MG gate stack and NiGe source/drain regions. It is shown that the mobility enhancement observed in long channel Ge pFETs as compared to Si pFETs, can indeed result in deep sub-micron Ge devices with a higher drive
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