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The interplay between the performance of nitride stress liner technologies and the contact metallization is studied based on computer simulations. Three dimensional models of transistor devices including the contacts have been created for the 32nm and 45nm technology nodes. The loss of stressor performance by opening the contact holes is studied systematically as function of the contact width. The...
In a standard process with a conventional rapid thermal annealing (RTA) stress engineering is a standard feature for advanced CMOS technologies to improve device performance (M. Horstmann et al., 2005). Unfortunately, such an annealing scheme does not meet the 32 nm node requirements due to thermal diffusion and solid solubility limitations. To solve the problem, technologies like flash lamp annealing...
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