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An experimental SiGe HBT technology featuring fT/fmax/BVCEO = 505 GHz/720 GHz/1.6 V and a minimum CML ring oscillator gate delay of 1.34 ps is presented. The improved speed compared to our previous SiGe HBT developments originates primarily from an optimized vertical profile, an additional decrease of the base and emitter resistance which is made possible by combining millisecond annealing with a...
Hot-carrier induced degradation and post-stress recovery of 240/300 fT/fMAX SiGe HBTs are investigated. The investigation includes the impact of stress conditions and lateral scaling. Self-heating is employed as a means to investigate thermal-induced recovery activation and rate.
This work reports on first experiments with millisecond flash anneals for SiGe HBTs. Model experiments on blanket wafers were used to study the effects of flash annealing on HBT-typical doping profiles in comparison to the standard spike annealing, and to find out an appropriate temperature range for transistor functionality. An integration lot was processed and analyzed to get a comprehensive insight...
Variants of P in situ spike doped poly-Si emitters are compared with an As implanted poly-Si emitter for use in HBTs. The main goal is the optimization of the thermal process after emitter doping. The base B diffusion is shown to be stronger influenced by the emitter dopant outdiffusion for P than for As. This effect is investigated by means of an improved B SIMS profiling, and by CV measurements...
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