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This paper investigates the impact of random dopant fluctuation effect on surrounding gate MOSFET, from atomic statistical simulation of device to circuit performance evaluation. The doping profile is generated by an analysis of each lattice atom and then the threshold voltage variation is obtained by device drift-diffusion simulation. Then the circuit performance evaluation is performed by feeding...
Electron mobility in nanoscale double-gate (DG) MOSFETs with symmetric, asymmetric and independent operation modes is studied in this paper by using a comprehensive numerical model. A numerical program is first developed and then the dependence of electron mobility on device geometry and bias conditions are simulated. It is shown that that electron mobility changes monotonically with effective field...
In this paper, a novel field effect nanowire MOS transistor taking advantage of both dual-material gate and surrounding gate is proposed and performance characteristics are demonstrated numerically in detail. Surrounding-gate transistor is known to be used to enhance the electrostatic control of the channel, and dual-material-gate structure is extended from split-gate field effect transistor to obtain...
Numerical simulation study on electron mobility in independent DG MOSFETs with back gate biased in accumulation, flatband and inversion operation regions is presented in this paper. A numerical simulation program of the electron transport in the independent DG MOSFETs, which includes both phonon and surface roughness scattering mechanisms, is developed. From it, the dependence characteristics of the...
ULTRA-SOI is a new generation of the channel-potential-based non-charge-sheet model for the dynamic depletion (DD) Silicon-On-Insulator (SOI) MOSFET, developed by TSRC group in EECS department of Peking University with many year efforts. The model is formulated with a fully physical derivation from the Poisson's equation to solve the potential along the vertical direction of the silicon film. The...
This paper describes a web-based platform for nanoscale non-classical device modeling and circuit simulation, especially for non-classical CMOS device compact modeling and circuit performance prediction. This platform is based on program libraries, including model code files. We use SPICE as circuit simulation framework, and the Verilog-A as model design language. Based on the user input deck content,...
This paper presents both static and dynamic NBTI Negative Bias Temperature Instability model based on the novel Reaction-Trapping theory. The accuracy of the proposed is greatly improved comparing to the classical Reaction-Diffusion theory, and the results agree well with the experiments over a wide range of temperature. Finally, the NBTI model of FinFETs is demonstrated through SRAM simulation.
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