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Three-dimensional dynamic random access memory (3D DRAM) using through-silicon via (TSV) has been acknowledged as one good approach for overcoming the memory wall. However, the IO-channel power of a TSV-based 3D DRAM represents a significant portion of the 3D DRAM power. In this paper, we propose a built-in self-test (BIST) -assisted tuning scheme to adjust the driving capability of programmable drivers...
Three-dimensional (3D) integration using through silicon via (TSV) has been widely acknowledged as one future integrated-circuit (IC) technology. A 3D IC including multiple dies connected with TSVs offers many benefits over current 2D ICs. However, the testing of 3D ICs is much more difficult than that of 2D ICs. In this paper, we propose a cost-effective built-in self-test circuit (BIST) to test...
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