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This paper describes a MEMS tunable bandpass filter, which operates at the K band and features a low insertion loss of -2.79-3.58 dB, a small size of 2.9 mm by 1.5 mm and a wide continuous tuning range of 32%. The tunable filter is based on MEMS-varactors-loaded microstrip resonators and has been directly constructed on a high-k low-temperature-co-fired-ceramics (LTCC) wiring wafer using MEMS-on-LTCC...
This paper presents a novel tunable power amplifier module consisting of a CMOS-based broadband power amplifier and a MEMS tunable bandpass filter in K-band. The 90-nm CMOS-based power amplifier with a two-stage cascode configuration and a broadband output matching circuit has an output power of over 20 dBm at a wide frequency range between 16 GHz and 26 GHz. The power amplifier module with a MEMS...
We have fabricated a 24 GHz power amplifier (PA) module in a standard 90-nm Si-CMOS process. The PA module consists of two 2-stage cascode configuration PA MMICs and an off-chip Wilkinson power divider and combiner. Each single PA MMIC has a gain of 22 dB with a P3dB output power of 18.3 dBm at 24 GHz load-pull measurement. The fabricated PA module demonstrates state-of-the-art performance, including...
A 9.5 mW 20 Gb/s 40times70 mum2 inductorless 1:4 DEMUX in 90 nm CMOS process is presented. In order to reduce power and area, the DEMUX uses a multi-phase clock architecture that requires a smaller number of latches operating at a slower clock rate than in the conventional tree architecture. To provide low-voltage scalability, the latches operate with a near-tail-to-rail logic swing. It is realized...
CMOS technology is being advanced rapidly and applications are now expanding into the millimeter-wave regime on a global basis. 60 GHz wireless systems in CMOS have already been reported. In addition, 77 GHz automotive radar is becoming the target for CMOS technology. This paper describes what is believed to be the first transceiver chip for 77 GHz radar in standard 90 nm CMOS.
Since MRAM cells have unlimited write endurance, they can be used as substitutes for DRAMs or SRAMs. MRAMs in electronic appliances enhance their convenience and energy efficiency because data in MRAMs are nonvolatile and retained even in the power-off state. Therefore, 2 to 16 Mb standalone MRAMs have been developed. However, in terms of their random-access times, they are not enough fast (25ns)...
This paper presents a 20-GHz pseudo-differential power amplifier (PA) fabricated in a standard 90-nm Si-CMOS process. The pseudo-differential PA has a two-stage cascode configuration with differential input and output ports. Assuming the use of an off-chip transformer, the input impedance of each single PA is designed to be 6.25 Omega and the output impedance to be 25 Omega. The individual amplifier...
In this paper, a three-stage LNA employing a dual noise-matching topology has been proposed. The proposed LNA has two noise-matched CS amplifiers in the first and second stages instead of the conventional cascode configuration, and the LNA realizes lower noise figure than the conventional one. The simulation results of the proposed LNA show that an input matching and output matching result less than...
Stress induce voiding (SIV) inside and under vias in copper interconnects with ldquowingrdquo-pattern were investigated for 90 nm and 65 nm node processes. The difference of two voidings are the resistance change during acceleration test and the diffusion path. However, common features were found between both types of voiding; the interconnect fails fast as the ldquowingrdquo area grows. Both types...
This paper describes the implementation of 60 and 77GHz PAs in standard 90nm CMOS technology. An accurate transistor model is developed that enables designing circuits operating at frequencies up to 80GHz. The circuits are designed with a unique matching topology for reducing the RF signal loss in matching networks.
A 25-GHz, 40-mW power amplifier with SO-Omega input and output matching circuit in standard 90-nm Si-CMOS technology is reported. The supply voltage of 3.3 V is compatible with that of conventional wireless communication systems. To enable this, a stacked cascode configuration with a Vdd = 1.2 V transistor and a Vdd = 3.3 V thick oxide transistor for digital I/O interfaces is used. The power amplifier...
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