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SRAM-based FPGA has become a core device in space application. However, based on CMOS technology, SRAM-based FPGA is sensitive for SEU effect. JTAG circuit is a significant module of SRAM-based FPGA, executing boundary-scan test and global configuration function. SEU effect can result in function disturbance of JTAG circuit. To adopt reasonable harden strategies for JTAG circuit, the paper puts forward...
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