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IR-drop values of power grid can be reduced through inserting on-chip low-dropout voltage regulators (LDO). In this paper, we explore the optimization of LDOs to meet the IR-drop constraint, where the maximum IR-drop value is less than 10% of power supply. With Cholesky direct solver and SPICE, we propose a method to simulate power grid with LDOs. Based on the simulation method, we develop an efficient...
The novel field-programmable-gate-array (FPGA) technology is able to combine an embedded processor and an application intellectual property to be a system-on-a-programmable-chip developing environment. Therefore, this paper presents a motion control IC for the X-Y table under this novel FPGA technology. The proposed motion control IC has two modules. One module performs the functions of the motion...
The rectilinear Steiner minimal tree (RSMT) problem is essential in physical design. Moreover, the variant constraints for fabrication issues, including obstacle avoidance, multiple routing layers, layer-specific routing directions, cannot be ignored during RSMT construction for modern SoC and nano technologies. This paper proposes a construction-by-correction approach for obstacle-avoiding preferred...
Multi-layer obstacle-avoiding rectilinear Steiner tree construction is an essential problem in physical design for advanced SoC and nano technologies. This paper unifies obstacle-avoiding rectilinear Steiner tree construction either for single or for multiple routing layers. Experimental results show that our algorithm outperforms the state-of-the-art works for both cases.
Owing to the rapid advance in semiconductor fabrication technology, a large number of transistors can be incorporated onto a single chip. However, this will reduce the controllability and observability of the chip significantly. Consequently, testing such highly complex and dense circuits becomes very difficult and expensive. Therefore, we propose an efficient design-for-testability technique based...
The new generation of field programmable gate arrays (FPGAs) technology enables to be embedded a processor to construct an SoPC (system-on-a-programmable-chip) developing environment. Therefore, this study presents a servo control IC for X-Y table using this SoPC technology. In this proposed servo control IC, there are two modules. One module performs the functions of the motion trajectory and two-axis...
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