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The subthreshold circuit is a promising ultra-low-power solution for such applications that don't require high speed but are extremely power-stringent. The characteristic of the current under subthreshold voltage is different from the normal domain. A delay model is essential to predict the performance, analyze the variation impacts and optimize the design. This paper proposes a fast computable delay...
Non-volatile memory (NVM) is one recent promising solution to build the next generation of memory system. Compared to other non-volatile devices such as flash, phase-change random-access-memory (PCRAM), memristor and etc., the emerging conductive-bridge random-access-memory (CBRAM) has shown advantages in accessing speed, power and endurance. In this paper, design of 3D-stacked NVM is explored with...
To design an energy efficient data collection scheme instead of multi-hop data relay is essential for Wireless Sensor Networks. To many proposed data gathering approaches, the long data delay is the main problem. In this paper, mobile collectors are introduced in a sensor network and a data collection mechanism is proposed. To organize sensors into three-level clusters, an energy efficient clustering...
Field programmable gate arrays (FPGAs) allow the same silicon implementation to be programmed or reprogrammed for a variety of applications. It provides low NRE (non-recurring engineering) cost and short time to market. As CMOS technology continue to scale down to nanometer, increased power consumption and worsened process variation become crucial constraints for FPGAs. The survey reviews the process...
Sensor networks are prone to congestion due to bursty and high-bandwidth data traffic, combined with wireless links and many-to-one data routing to a sink. Delayed and dropped packets then degrade the performance of the sensing application. In this paper, we investigate the value of separate handling of sensor control and data traffic, during times of congestion, in a closed-loop sensor network. We...
This paper presents in details the architecture and most of RF front-end building blocks of a fully integrated passive radio frequency identification (RFID) transponder operating at UHF 902 MHz to 928 MHz. A novel architecture for the transponder IC and a new low power on-off keying (OOK) demodulator are proposed in this paper. For realizing the system, a low power CMOS full-wave rectifier achieving...
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