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A voltage-pulse method is utilized to investigate the charge-injection-induced time decay of the source-drain current of field-effect transistors with randomly networked single-walled carbon nanotubes (CNTs) as the conduction channel. The relaxation of trapped carriers in the CNT networks can be accounted for by assuming two exponential decays occurring simultaneously. The slow decay is characterized...
A novel DRAM cell based on floating gate (FG) concept is investigated. Compared to the conventional two-transistor FG DRAM cells, this new memory cell has a much simpler configuration with only one transistor. Besides, its write speed is improved by introducing an integrated gated diode and state ldquo1rdquo can be self-refreshable. In this paper, the device configuration, the DRAM application feasibility,...
We propose pipe-shaped bit cost scalable (P-BiCS) flash memory which consists of pipe-shaped NAND strings folded like a u-shape instead of the straight-shape. P-BiCS flash technology achieves a highly reliable memory film of which the program and erase (P/E) operation is managed by Fowler-Nordheim (FN) tunneling, that is originated by the strong curvature effect of its small pipe radius, a low resistance...
A charge based compact model with self-heating effects has been developed for LDMOS transistors. Both the channel and drift regions in LDMOS are modeled without adding an internal drain node. An efficient scheme for including self-heating effects is implemented in the model, which requires no thermal network. A comparison with measured data from an LDMOS shows that the model has excellent accuracy...
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