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In this paper 1-kb multi-bit OTP IP, which is non-volatile memory, is designed for a power management IC. A conventional multi-bit OTP cell uses isolated NMOS transistor, but the cell size is large in the BCD process. So, PMOS transistor is used instead of the isolated NMOS transistor as antifuse, and the cell size is minimized by optimizing the size of PMOS transistor. In addition, an ESD protection...
The fabrication of Germanium-On-Insulator (GeOI) by wafer bonding and ion-cut approach was investigated. With cyclic HF/DIW cleaning and N2 plasma surface activation, large-area layer transfer of GeOI substrates was realized by ion-cut processes with bulk Ge wafer as the donor wafer. The GeOI substrates are thermally stable up to 550??C annealing and surface roughness can be smoothed down to 0.3 nm...
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