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In a Multi-Processor System-on-Chip (MPSoC)-based embedded system with Network-on-chip (NoC) as the communication architecture, routing of the communication traffic among the Processing Elements (PEs) contributes significantly to the overall latency, throughput and energy consumption. Design of an efficient routing algorithm for NoC requires a thorough understanding of the role of individual components...
This paper studies the problem of coverage management with two emerging formalisms in simulation based validation, namely formal specification of test points and the use of inline temporal assertions. We present methods for checking whether a test-bench with inline assertion covers a set of formal test points. This is particularly useful in developing verification IPs for standard on-chip protocols...
The challenge today is to develop a modeling and simulation paradigm that integrates structural, molecular and genetic data for a quantitative understanding of physiology and behavior of biological processes at multiple scales. This paradigm requires techniques that maintain a reasonable accuracy of the biological process and also reduces the computational overhead. This objective motivates the use...
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