The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
Transformerless PV inverters are known to generate undesirable ground leakage currents due to the lack of galvanic isolation between the PV array and the electric grid. This paper initially discusses the different types of transformerless PV inverter topologies that have been proposed to overcome this problem. It then proposes a new topology, which extends the commercially successful HERIC inverter...
The paper presents a circuit that reduces the voltage stress caused by DC-link capacitor voltage ripple on the switching devices of a three-level Neutral-Point-Clamped (NPC) inverter. The circuit is capable of halving the amplitude of the voltage ripple seen by the inverter devices. It is proposed as an alternative to over-sizing the inverter's DC-link capacitors, or using capacitor-balancing PWM...
Multiple inverter systems are examined from the aspect of their DC-link capacitors. A common capacitor is assumed and its current spectrum is derived for single and three-phase inverter systems. The effect of introducing a phase shift between the inverter reference or carrier waveforms is investigated, to reveal potential reductions in DC-link capacitor rms (ripple) current. It is shown that significant...
Loss estimation is a critical aspect of inverter design. The present work investigates the losses occurring in the DC-link capacitors of the three-phase three-level Neutral Point Clamped and Cascaded H-Bridge inverter topologies, by performing a harmonic analysis of the capacitor currents. Results are verified by simulations. Their analysis reveals the advantage of the NPC inverter.
This paper investigates semiconductor and DC-link capacitor losses in two two-level and two three-level voltage source inverters. The components of the four inverters are selected to have appropriate voltage and current ratings. Analytical expressions for semiconductor losses are reviewed and expressions for DC link capacitor losses are derived for all topologies. Three-level inverters are found to...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.