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For critical aerospace applications that experience a high intensity of single event upsets, the cache of a processor has to be protected against soft errors. This poses a challenge for cache design, since implemented redundancy causes timing and performance degradation of a processor. Sound design decisions should be made based on evaluations at every design stage. In this paper we present a platform-oriented...
The driving forces for this project are demands for a hardware, reconfigurable, high performance, low cost and low power solution that could be used in a widest range of Internet of Things (IoT) devices. The solution should be able to secure computer networks against emerging threats and vulnerabilities, sustaining privacy and trust This paper presents an approach for developing a novel hardware platform...
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