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It is a known fact that an arithmetic function implemented in hardware has a higher throughput and calculation frequency than the one implemented in software, thus making the usage of hardware components imminent in applications where speed plays a crucial role. Sum of absolute difference (SAD) is an arithmetic operation most frequently used in motion estimation algorithms and video coding consequently...
Engineering teams all over the globe are facing daunting tasks in the design of system components in the contemporary multi-billion transistor era. Even though there are EDA tools to generate intellectual property (IP) blocks for many circuits, to the best of our knowledge, there are no tools to design IP blocks of multi-vector multiplication units, which are required in order to design hardware solvers...
Heterogeneous architectures require custom intellectual property (IP) blocks, named ‘accelerators’, that perform an operation efficiently. Residue Number System (RNS), a non binary compatible arithmetic system, can be used in such accelerators. One fundamental challenge in the design of RNS circuits is the selection of the moduli set. Here, we present our algorithm that results in very good moduli...