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This paper describes a large signal Silicon on Insulator (SOI) substrate modeling methodology for high power circuit applications such as RF Switches. It is shown that the use of a varactor in place of a linear capacitor representing the buried oxide (BOX) improves the harmonic predictions of the circuit. The new substrate model is validated against 2nd and 3rd harmonics of an RF SOI switch operating...
A single-pole double-throw novel switch device in 0.18 ??m SOI complementary metal-oxide semiconductor (CMOS) process is developed for 0.9 Ghz wireless GSM systems. The layout of the device is optimized keeping in mind the parameters of interest for the RF switch. A subcircuit model, with the standard surface potential (PSP) model as the intrinsic FET model along with the parasitic elements is built...
The maximum electron and hole mobility enhancement for uniaxial process-induced strained silicon is modeled and experimentally measured using a flexure based 4-point wafer bending jig. The highest known uniaxial stress to date is introduced into the channel of MOSFETs (applied mechanical stress of ~1.0GPa on samples with initial process stress of 1GPa for a total channel stress of ~2Pa). The maximum...
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