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Real-time operation and low-power dissipation in video coding systems have become important research challenges, especially in mobile devices with limited battery and computational resources. Given the variety of applications able to manipulate videos and the growing number of video coding standards, current devices are expected to provide native support to multiple coding standards. Although state-of-the-art...
The intense demand for video applications from mobile devices brings a challenge to the hardware design, especially in the energy consumption. This work presents a design space exploration to define energy-efficient cache memory configurations for the ME process considering different video sequences and HEVC encoder configurations. We focus on the Motion Estimation (ME) process, known as the most...
Nowadays, digital video processing has become an important challenge when developing digital systems, mainly in terms of energy consumption. The High Efficiency Video Coding (HEVC) is the state-of-the-art video coding standard and the energy profiling of different HEVC encoder implementations is of key importance. HEVC encoder has different implementations developed for different goals. This work...
Real-time operation and low-power dissipation in video coding systems have become important research challenges, especially in mobile devices with limited battery and computational resources. There are many video coding standards coexisting in the market nowadays, so it is important for current devices to support different video coding standards. This paper presents a multi-standard luminance sub-samples...
This paper presents a hardware design for the sub-sample interpolator used in FME (Fractional Motion Estimation) and MC (Motion Compensation) stages according to the VP9 and VP10 video-coding standards. The proposed architecture is able to save hardware resources through an optimized-filter organization whereas reaching high-throughput and low-power dissipation. The hardware design was described in...
The current state-of-art video coding standard, the High Efficiency Video Coding (HEVC), brings many innovations as a way to improve the coding performance. However, the improvement on performance also brought higher computational effort and energy consumption. Since most of devices that handle digital videos are battery powered, the energy consumption became an important issue that demands efficient...
This paper presents a high throughput architecture for a Motion Compensation (MC) sample interpolator targeting the High Efficiency Video Coding (HEVC) standard. Real-time operation and low power dissipation in video coding systems have become important research challenges, especially in mobile devices with limited computational resources and battery availability. The Fractional Motion Estimation...
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