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As technology scales and VLSI systems become more and more complex, both bus and crossbar-based architectures are no longer suitable for implementing communications between the system components. Thus, a specific NoC is needed so as to meet the user-defined constraints (area, bandwidth, energy dissipation) while ensuring system reliability. The NoC design flow which is presented in [1] addresses related...
The paper presents a new design methodology of a customized and distributed network on chip (NoC) that efficiently deals with either real-time or high throughput systems. Our previous work [1] efficiently transforms a complex VLSI system into a number of distributed subsystems. The functional decomposition was achieved thanks to a judicious task assignment so that the tasks that strongly communicate...
The current systems are very complex and feature a high degree of communications. Because the bus is a critical and shared resource, it can no longer cope with the requirements of applications for which the bandwidth is a critical parameter. An intermediate solution was to use cross-bars but was also rejected in favor of more interesting solutions: using a network on chip (NOC) in order to meet the...
This paper looks at the highest design level and presents a methodology for designing Systems On Chip (SOC) with low energy dissipation. The aim is achieved through a functional decomposition of the system, followed by an appropriate allocation of tasks to the different components of the system (ASICs and processors). With our approach, it is possible to generate architectures with different features...
The paper proposes an FPGA-like approach to on-chip communication and comes up with a design methodology where switches are avoided and where two any IPs are connected if and only if they are communicating. It avoids the problem of costly (time, area, energy) intermediate hop counts of on-chip networks (NOCs) between any two source-destination pairs. The second novelty is that without knowing the...
We present in this paper a CAD tool that aims at designing low-energy buses. The Graphical User Interface (GUI) we developed manages many techniques dealing with the addressed problem: simple coding, coding subject to fixed / dynamic probabilities and an enhanced dynamic probabilities-based technique. Moreover, this environment allows tuning the parameters of data encoding / decoding and is able to...
We present in this paper a CAD tool that aims at designing low-energy buses. The Graphical User Interface (GUI) we developed manages many techniques dealing with the addressed problem: simple coding, coding subject to fixed / dynamic probabilities and an enhanced dynamic probabilities- based technique. Moreover, this environment allows tuning the parameters of data encoding / decoding and is able...
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