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Chaos of data is the total unpredictability of all the data elements, and can by quantified by Shannon entropy. In this paper, we firstly propose an entropy based theoretic framework for machine learning, which states that chaos in sample data will decrease and rule will advance as learning progresses. However, it is usually time consuming to apply the theoretic framework because groups of rule need...
Recently, the emerging accumulation of biomedical data on the Web (e.g. vast amounts of protein sequences, genes, gene products, drugs, diseases and chemical compounds, etc.) has shaped a big network of isolated professional knowledge. Embedded with domain knowledge from different disciplines all regarding to human biological systems, the decentralized data repositories are implicitly connected by...
Land cover classification of remote sensing (RS) data plays a key role in various spatio-temporal applications. Moreover, scalability and efficiency have become the most important challenges because of increasing RS data. In this paper, we propose a novel MapReduce accelerated extreme learning machine (ELM) ensemble classifier called ELM-MapReduce for large scale land cover classification. First,...
Asynchronous logic shows promising applicability in ASIC design due to its potentially low power and high robustness properties. For deep submicron technologies the static power is becoming very significant and many applications require that this power component to be reduced. A new logic called Positive Feedback Charge Sharing Logic (PFCSL) is proposed, which reduces both dynamic and especially static...
A novel asynchronous bidirectional arithmetic Logic Unit (ALU) is introduced in this paper. The adder in the proposed design is a ripple carry adder with the bidirectional characteristic. The ALU is designed with asynchronous dual rail circuit style. Several ALUs with sizes ranging from 4bits to 32 bits were built. Their power and performance metrics were compared with the conventional ALUs built...
Leakage power is becoming the dominant power domponent in deep submicron technology and stability of the data storage of SRAM (Static Random Access Memory) cells is drawing more concerns with the reduced feature sizes. A novel 8T SRAM cell design considering these leakage and stability issues is proposed in this paper. Higher read static noise margin (SNM) compared to conventional 6T SRAM is achieved...
In this paper a new static average case dynamic power estimation technique is introduced based on the property of randomness preservation for digital circuits. The proposed technique is validated by estimating the average case power for a block cipher, DES with a lower estimation error percentage of 0.9481 % and lesser simulation time with a pattern reduction of (2" × 2"!)-(2" × 2"...
Finite State Machines (FSM) are an important category of digital circuits. Simply put, an FSM starts from a certain state, receives a sequence of inputs, changes its internal states, and produces a sequence of outputs. We define the reverse of a given FSM as an FSM that given the original final state and the reversed sequence of original outputs, can produce the reversed sequence of original inputs...
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