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Dynamically and partially reconfigurable architectures, like FPGAs, have increasingly become heterogeneous with DSP, RAM and communication interface blocks. However, in most of online FPGA task placement approaches, the FPGA is modeled as a homogeneous architecture. In this work, we propose a heuristic which focus on the online task placement problem on a multi-context, dynamically and partially heterogeneous...
This article proposes a spatio-temporal scheduling algorithm for a three-dimensional integrated circuits (3D ICs) defined by stacking an homogeneous embedded Field-Programmable Gate Array (eFPGA) above an homogenous Chip MultiProcessor (CMP) layer over through-silicon vias (TSVs) connection. Our proposal, based on Proportionate-fair (Pfair) algorithm, computes the spatio-temporal scheduling of hardware...
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