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This paper presents an integrated test platform for imagers, which allows their electrical characterization by directly injecting the input current in each individual pixel. The core of the proposed ITP is a matrix of controllable current sources featuring low technology dependence, together with easily scalable row and column DACs for the digital programming of every single pixel current. A 10kfps...
This paper presents a novel digital pixel architecture for MWIR PbSe sensors and high-speed AER imagers. Low-power and compact circuits are proposed for pixel built-in log-domain temporal contrast, signal adapted self-biasing, linear current to spike frequency conversion under high-speed AER communications, and digital PLL-based technology and temperature compensated tuning. The proposed CMOS design...
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